As semiconductor devices, such as memory devices, are becoming increasingly integrated, achieved degree of integration with typical two-dimensional (2D) structures is rapidly approaching its limit. Therefore, there is a need for a semiconductor memory device having a three-dimensional (3D) structure that exceeds the integration capability of the 2D structure. Such need has led to extensive research into developing 3D semiconductor memory device technology.
In a 3D semiconductor memory device, various signals carrying data, commands, or addresses are transmitted, some or all of which are transmitted through a through silicon via (TSV). For the current process and techniques, the through silicon via technique is divided into three types, including the via-first process, the via-middle process, and the via-last process. In the via-first process, through silicon holes are formed on the silicon substrate (or wafer) and filled with a conductive material before the formation of the main device, such as a metal-oxide-semiconductor (MOS) device. Considering the high temperature of procedures in the subsequent MOS process, the selection of the conductive material is basically limited to those which can withstand high temperatures, such as polysilicon, rather than the otherwise-desirable copper, because copper tends to exhibit pumping and is unable to maintain a low electrical resistance after being subject to repeated thermal processes.
However, when the thermal process is carried out, dopants is introduced into the polysilicon for reducing the resistance thereof diffuse from the polysilicon into the main device, where out-diffusion of the dopants may alter the electrical characteristics of the main device.
This Discussion of the Background section is provided for background information only. The statements in this Discussion of the Background are not an admission that the subject matter disclosed in this Discussion of the Background section constitute prior art to the present disclosure, and no part of this Discussion of the Background section may be used as an admission that any part of this application, including this Discussion of the Background section, constitutes prior art to the present disclosure.